Enabling extreme scale applications on heterogeneous hardware

EPiGRAM-HS is motivated by the increasing presence of heterogeneous technologies on pre-exascale supercomputers and by the need of porting key HPC and emerging applications to these systems on time for exascale.

We are working towards delivering a new validated programming environment, extending the programmability and maximizing the productivity of application development for large-scale heterogeneous computing systems.

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A must-read paper for any HPC professional. Benchmarking HPC apps is actually hard 😥, reporting their performance in an enlightening and meaningful way is also hard. Proud to have @spcl_eth as partners in our project!
https://t.co/xYlfaiFGMb

insideHPC.com@insideHPC

Video: Scientific Benchmarking of Parallel Computing Systems

https://t.co/WmINMdCyWO #HPC

The DOE workshop on extreme heterogeneity report is out. Programmability, mapping of software to het. systems, data centricity, correctness, software sustainability, OS and interoperability are some of the main topics. We will work also on some of these issues! 👩‍💻👨‍💻

Jonathan Beard@jonathan_beard

Looks like the #DOE #ASCR Workshop on Extreme Heterogeneity report is now posted for public consumption -> https://t.co/zCFulLKKqj #research #hpc #extremeheterogeniety @HPC_Guru https://t.co/DPcKqJIQYB

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EPiGRAM-HS is consisted of 6 key European universities and enterprises focused on high performance computing.

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Delivering a new validated programming environment for large-scale heterogeneous computing systems for enabling HPC and emerging deep-learning frameworks to run on large-scale heterogeneous systems at maximum performance.

Extending the programmability of large-scale heterogeneous systems with GPUs, FPGAs, HBM and NVM, by introducing new concepts, adding functionalities and carrying out implementations in two widely-used HPC programming systems for large-scale supercomputers (MPI and GASPI)

Maximizing the productivity of application development on heterogeneous supercomputers by providing auto-tuned collective communication, a framework for automatic code generation for FPGAs, a memory abstraction device comprised of APIs and a runtime for automatic data placement on diverse memories, and a DSL for large-scale deep-learning frameworks.